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LTC1555L-1.8 SIM Power Supply and Level Translator
FEATURES
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DESCRIPTIO
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Buck/Boost Charge Pump Generates 1.8V, 3V or 5V Input Voltage Range: 2.6V to 6V Controller VCC Range: 1.425V to 4.4V >10kV ESD on All SIM Contact Pins Short-Circuit and Overtemperature Protected Meets all ETSI and IMT-2000 SIM Interface Requirements 1.8V to 5V Signal Level Translators Very Low Operating Current: 32A Very Low Shutdown Current: <1A Soft-Start Limits Inrush Current at Turn-On 1MHz Switching Frequency Available in 16-Pin Narrow SSOP Package
The LTC(R)1555L-1.8 provides power conversion and level shifting needed for low voltage GSM and WCDMA cellular telephones to interface with either 1.8V, 3V or 5V subscriber identity modules (SIMs). The part contains a patented buck/boost charge pump DC/DC converter* that delivers a regulated VCC supply voltage to the SIM card. Input voltage may range from 2.6V to 6V allowing direct connection to the battery. The output voltage may be programmed to 1.8V, 3V, 5V or direct connection to the VIN pin. Internal level translators allow controllers operating with supplies as low as 1.425V to interface with 1.8V, 3V and 5V SIMs. A soft-start feature limits inrush current at turnon, mitigating start-up problems that may result when the input is supplied by another low-power DC/DC converter. Battery life is maximized by 32A operating current, and 1A shutdown current. Board area is minimized by the miniature 16-pin narrow SSOP packages and the need for only three small external capacitors.
, LTC and LT are registered trademarks of Linear Technology Corporation. *U.S. Patent No.: 5,973,944
APPLICATIO S
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SIM Interface in GSM Cellular Telephones WCDMA SIM Interface Smart Card Readers
TYPICAL APPLICATIO
GSM Cellular Telephone SIM Interface
GSM CONTROLLER VIN 2.6V TO 6V 16 15 14 13 12 11 10 9 0.1F 1F GND
1555L TA01
1.425V TO 4.4V 1 2 3 4
LTC1555L-1.8 CIN RIN DATA DDRV DVCC M2 M1 M0 CLK RST I/O VCC VIN C1 + C1 - GND
VCC
5 6 7 8
2.2F
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SIM CLK RST I/O VCC = 1.8V,3V,5V IVCC = 10mA
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LTC1555L-1.8
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW CIN 1 RIN 2 DATA 3 DDRV 4 DVCC 5 M2 6 M1 7 M0 8 16 CLK 15 RST 14 I/0 13 VCC 12 VIN 11 C1+ 10 C1- 9 GND
VIN, DVCC to GND ..................................... -0.3V to 6.5V VCC to GND ...............................................- 0.3V to 6.5V Digital Inputs to GND ................................- 0.3V to 6.5V CLK, RST, I/O to GND ..................... - 0.3V to VCC + 0.3V VCC Short-Circuit Duration ............................... Indefinite Operating Temperature Range (Note 2) .. - 40C to 85C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering,10 sec)................... 300C
ORDER PART NUMBER LTC1555LEGN-1.8
GN PART MARKING 555L18
GN PACKAGE 16-LEAD PLASTIC SSOP TJMAX = 125C, JA = 150C/W
Consult factory for parts specified with wider operating temperature ranges.
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. (VIN = 2.6V to 6V, DVCC = 1.425V to 4.4V, controller digital pins tied to DVCC, SIM digital pins floating, C1 = 0.1F, COUT = 2.2F unless otherwise noted)
PARAMETER VIN Operating Voltage DVCC Operating Voltage DVCC Undervoltage Lockout VIN Operating Current VIN Shutdown Current DVCC Operating Current DVCC Shutdown Current VCC Output Voltage VCC = 3V, IVCC = 0V M0, M1 = 0V M0, M1, DATA = DVCC, CIN = 1MHz M0, M1 = 0V, DATA, CIN = DVCC 0 < IVCC < 10mA M0, M1 = DVCC, 2.6V < VIN < 6V M0, M1 = DVCC, 2.7V < VIN < 6V M0 = DVCC, M1 = 0 M0 = 0, M1 = DVCC M0 = DVCC, M1 = 0, M2 = DVCC, 0 IVCC 6mA M0 = DVCC, M1 = 0, M2 = DVCC, VIN 3V, IVCC 10mA VCC Shorted to GND
q q q q q 4.55 q 4.75 q 2.8 q VIN - 0.2 q 1.71 q 1.71 q
ELECTRICAL CHARACTERISTICS
CONDITIONS
MIN
q q
TYP
MAX 6 4.4
UNITS V V V A A A A V V V V V V mA MHz
2.6 1.425 1.2 27 5
65 1 30 1
5 5 3 1.8 1.8 50 1
5.25 5.25 3.2 VIN 1.89 1.89 150
VCC Short-Circuit Current Charge Pump fOSC
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LTC1555L-1.8
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. (VIN = 2.6V to 6V, DVCC = 1.425V to 4.4V, controller digital pins tied to DVCC, SIM digital pins floating, C1 = 0.1F, COUT = 2.2F unless otherwise noted)
PARAMETER Controller Inputs/Outputs (DVCC = 1.8V) Input Current (IIH /IIL) Input Current (IIH /IIL) High Level Input Current (IIH) Low Level Input Current (IIL) High Input Voltage Threshold (VIH) Low Input Voltage Threshold (VIL) High Level Output Voltage (VOH) Low Level Output Voltage (VOL) DATA Pull-Up Resistance DATA Output Rise/Fall Time SIM Inputs/Outputs (VCC = 3V or 5V) I/O High Input Voltage Threshold (VIH) I/O Low Input Voltage Threshold (VIL) High Level Output Voltage (VOH) Low Level Output Voltage (VOL) High Level Output Voltage (VOH) Low Level Output Voltage (VOL) I/O Pull-Up Resistance SIM Inputs/Outputs (VCC = 1.8V) I/O High Input Voltage Threshold (VIH) I/O Low Input Voltage Threshold (VIL) High Level Output Voltage (VOH) Low Level Output Voltage (VOL) High Level Output Voltage (VOH) Low Level Output Voltage (VOL) SIM Timing Parameters (DVCC = 1.8V, VCC = 5V) CLK Rise/Fall Time RST, I/O Rise/Fall Time CLK Frequency VCC Turn-On Time VCC Discharge Time to 1V CLK Loaded with 30pF, VCC = 3V or 5V VCC = 1.8V RST, I/O Loaded with 30pF CLK Loaded with 30pF COUT = 2.2F, IVCC = 0 IVCC = 0, VCC = 5V, COUT = 2.2F
q q q q
ELECTRICAL CHARACTERISTICS
CONDITIONS
MIN
q q q q q q q q q q q q
TYP
MAX 100 5 20 1 0.7 x DVCC DVCC - 0.6
UNITS nA A A mA V V V V V
M0, M1, M2, RIN, CIN DDRV DATA DATA M0, M1, M2, RIN, CIN, DDRV DATA M0, M1, M2, RIN, CIN, DDRV DATA DATA Source Current = 20A I/O = VCC DATA Sink Current = -200A I/O = 0V (Note 3) Between DATA and DVCC DATA Loaded with 30pF IIH(MAX) = 20A IIL(MAX) = 1mA I/O, Source Current = 20A DATA or DDRV = DVCC I/O, Sink Current = -1mA DATA or DDRV = 0V (Note 3) RST, CLK Source Current = 20A RST, CLK Sink Current = -200A Between I/O and VCC IIH(MAX) = 20A IIL(MAX) = 1mA I/O, Source Current = 20A DATA or DDRV = DVCC RST, CLK Source Current = 20A RST, CLK Sink Current = -200A
-100 -5 -20
0.2 x DVCC 0.4 0.7 x DVCC 0.4 13 20 1.3 30 2 0.7 x VCC 0.4 0.8 x VCC 0.4 0.9 x VCC 0.4 6.5 10 14 0.7 x VCC 0.2 x VCC 0.8 x VCC 0.4 0.9 x VCC 0.2 x VCC 18 50 1 5 0.5 0.5
V k s V V V V V V k V V V V V V ns ns s MHz ms ms
q q q q q q q
q q q
I/O, Sink Current = -200A DATA or DDRV = 0V (Note 3) q
q q
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC1555LEGN-1.8 is guaranteed to meet performance specifications from 0C to 70C. Specifications over the - 40C to 85C
operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: The DATA and I/O pull-down drivers must also sink current sourced by the internal pull-up resistor.
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LTC1555L-1.8 TYPICAL PERFOR A CE CHARACTERISTICS
IVIN vs VIN
50 IVCC = 0mA TA = 25C
40 VCC = 5V
30
VCC = 3V VCC = 1.8V
30
IDVCC (A)
IVIN (A)
IVIN (A)
20
10
2
3
4 VIN (V)
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VCC vs VIN
6.0 VCC = 5V IVCC = 10mA
5.5
VCC (V)
5.0 TA = 25C 4.5 TA = -40C
VCC (V)
VCC (V)
TA = 85C
4.0
2
3
4 VIN (V)
PIN FUNCTIONS
CIN (Pin 1): Clock Input Pin from Controller. RIN (Pin 2): Reset Input Pin from Controller. DATA (Pin 3): Controller Side Data Input/Output Pin. Can be used for single pin bidirectional data transfer between the controller and the SIM card as long as the controller data pin is open drain. The controller output must be able to sink 1mA max when driving the DATA pin low due to the internal pull-up resistors on the DATA and I/O pins. If the controller data output is not open drain, then the DDRV pin should be used for sending data to the SIM card and the DATA pin used for receiving data from the SIM card. DDRV (Pin 4): Optional Data Input Pin for Sending Data to the SIM Card. When not needed, the DDRV pin should either be left floating or tied to DVCC (an internal 1A current source will pull the DDRV pin up to DVCC if left floating). DVCC (Pin 5): Supply Voltage for Controller Side Digital Input/Output Pins (typically 3V). May be between 1.425V and 4.4V. The DVCC supply may be powered-down in shutdown for further reduction in battery current. When DVCC drops below 1.2V, the charge pump is disabled and the LTC1555L-1.8 goes into shutdown mode regardless of the signals on the M0-M2 pins.
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1555L * G01
IVIN vs Temperature
50 VIN = 3.6V IVCC = 0mA VCC = 5V 40 VCC = 3V VCC = 1.8V
15 20
IDVCC vs VDVCC
FCLK = 1MHz
TA = 85C 10
TA = -40C TA = 25C
20
5
10 -40
0
40 TEMPERATURE (C)
80
120
1555L * G02
0
1
2
3 VDVCC (V)
4
5
1555L * G03
VCC vs VIN
3.6 VCC = 3V IVCC = 10mA
2.2
VCC vs VIN
VCC = 1.8V IVCC = 10mA 2.0 TA = 25C
3.3 TA = 85C 3.0 TA = 25C 2.7 TA = -40C
1.8 TA = -40C TA = 85C 1.6
5
6
1555L * G04
2.4
2
3
4 VIN (V)
1.4
5
6
1555L * G05
2
3
4 VIN (V)
5
6
1555L * G06
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LTC1555L-1.8
PIN FUNCTIONS
M2 (Pin 6): Mode Control Bit 2 (see Table 1). (Pin 6 was previously used for soft-start control on the LTC1555.) M1 (Pin 7): Mode Control Bit 1 (see Table 1). M0 (Pin 8): Mode Control Bit 0 (see Table 1). GND (Pin 9): Ground for Both the SIM and the Controller. Should be connected to the SIM GND contact as well as to the VIN/controller GND. Proper grounding and supply bypassing is required to meet 10kV ESD specifications. C1- (Pin 10): Charge Pump Flying Capacitor Negative Input. C1+ (Pin 11): Charge Pump Flying Capacitor Positive Input.
Table 1. Truth Table
M0 0V 0V DVCC DVCC DVCC M1 0V DVCC 0V 0V DVCC M2 0V or DVCC 0V or DVCC 0V DVCC 0V or DVCC OPERATING MODE Shutdown (VCC = 0V) VCC = VIN VCC = 3V VCC = 1.8V VCC = 5V
BLOCK DIAGRA
VCC
CONTROLLER
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VIN (Pin 12): Charge Pump Input Pin. May be between 2.6V and 6V. There is no power-up sequencing requirement for VIN with respect to DVCC. VCC (Pin 13): SIM Card VCC Output. Should be connected to the SIM VCC contact. The VCC output voltage is determined by the M0-M2 pins (see Table 1). VCC is discharged to GND during shutdown (M0, M1 = 0V). A 2.2F low ESR ouptut capacitor should connect close to the VCC pin. I/O (Pin 14): SIM Side I/O Pin. The pin is an open drain output with a nominal pull-up resistance of 10k and should be connected to the SIM I/O contact. The SIM card must sink up to 1mA max when driving the I/O pin low due to the internal pull-up resistors on the I/O and DATA pins. The I/O pin is held active low during shutdown. RST (Pin 15): Level Shifted Reset Output Pin. Should be connected to the SIM RST contact. CLK (Pin 16): Level Shifted Clock Output Pin. Should be connected to the SIM CLK contact. Careful trace routing is recommended due to fast rise and fall edge speeds.
VBATT 0.1F CIN 1F C1+ VIN M0 M1 1.8V M2 UVLO DVCC RIN RST RST SIM CLK CLK STEP-UP/ STEP-DOWN CHARGE PUMP DC/DC CONVERTER C1- LTC1555L-1.8 VCC COUT 2.2F VCC
CIN
20k DATA 1A OPTIONAL DDRV
10k I/O I/O
GND
GND
1555L BD
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LTC1555L-1.8
APPLICATIO S I FOR ATIO
The LTC1555L-1.8 performs the two primary functions necessary for low voltage controllers (e.g., GSM cellular telephone controllers, smart card readers, etc.) to communicate with 5V SIMs or smart cards. The part produces a regulated 1.8V, 3V or 5V VCC supply for the SIM, and also provides level translators for communication between the SIM and the controller. VCC Voltage Regulator The regulator section of the LTC1555L-1.8 (refer to Block Diagram) consists of a buck/boost charge pump DC/DC converter. The charge pump can operate over a wide input voltage range (2.6V to 6V) while maintaining a regulated VCC output. The wide VIN range enables the part to be powered directly from a battery (if desired) rather than from a DC/DC converter output. When VIN is less than the selected VCC voltage, the part operates as a switched capacitor voltage doubler. When VIN is greater than VCC, the part operates as gated switch step-down converter. In either case, voltage conversion requires only one small flying capacitor and output capacitor. The VCC output can be programmed via the M0-M2 pins to either 1.8V, 3V, 5V or direct connection to VIN. This flexibility is useful in applications where multiple voltage SIMs may be used. When the charge pump is put into shutdown (M0, M1 = 0), VCC is pulled to GND via an internal switch to aid in proper system supply sequencing. An internal soft-start feature helps to limit inrush currents upon start-up or when coming out of shutdown mode. Inrush current limiting is especially useful when powering the LTC1555L-1.8 from a DC/DC output since the unlimited inrush current may approach 300mA and cause voltage transients on the 3V supply. The part is fully shortcircuit and over temperature protected, and can survive an indefinite short from VCC to GND. Capacitor Selection For best performance, it is recommended that low ESR (< 0.5) capacitors be used for both CIN and COUT to reduce noise and ripple. The CIN and COUT capacitors should be either ceramic or tantalum and should be 1F or greater (ceramic capacitors will produce the smallest output ripple).
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If the input source impedance is very low (< 0.5), CIN may not be needed. Increasing the size of COUT to 2.2F or greater will reduce output voltage ripple--particularly with high VIN voltages (4V or greater). A ceramic capacitor is recommended for the flying capacitor C1 with a value of 0.1F or 0.22F. Output Ripple Normal LTC1555L-1.8 operation produces voltage ripple on the VCC pin. Output voltage ripple is required for the parts to regulate. Low frequency ripple exists due to the hysteresis in the sense comparator and propagation delays in the charge pump enable/disable circuits. High frequency ripple is also present mainly from the ESR (equivalent series resistance) in the output capacitor. Typical output ripple (VIN < 4V) under maximum load is 75mV peak-to-peak with a low ESR, 2.2F output capacitor (VCC = 5V). The magnitude of the ripple voltage depends on several factors. High input voltages increase the output ripple since more charge is delivered to COUT per charging cycle. A large C1 flying capacitor (> 0.22F) also increases ripple in step-up mode for the same reason. Large output current load and/or a small output capacitor (< 1F) results in higher ripple due to higher output voltage dV/dt. High ESR capacitors (ESR > 0.5) on the output pin cause high frequency voltage spikes on VOUT with every clock cycle. A 2.2F ceramic capacitor on the VCC pin should produce acceptable levels of output voltage ripple in nearly all applications. Also, in order to keep noise down all capacitors should be placed close to LTC1555L-1.8. Level Translators All SIMs and smart cards contain a clock input, a reset input, and a bidirectional data input/output. The LTC1555L-1.8 provides level translators to allow controllers to communicate with the SIM. (See Figure 1a and 1b). The CLK and RST inputs to the SIM are level shifted from the controller supply rails (DVCC and GND) to the SIM supply rails (VCC and GND). The data input to the SIM may be provided two different ways. The first method is to use the DATA pin as a bidirectional level translator.
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LTC1555L-1.8
APPLICATIO S I FOR ATIO
This configuration is only allowed if the controller data output pin is open drain (all SIM I/O pins are open drain). Internal pull-up resistors are provided for both the DATA pin and the I/O pin on the SIM side. The second method is to use the DDRV pin to send data to the SIM and use the DATA pin to receive data from the SIM. When the DDRV pin is not used, it should either be left floating or tied to DVCC. Shutting Down the DVCC Supply To conserve power, the DVCC supply may be shut down while the VIN supply is still active. When the DVCC supply
LTC1555L-1.8 CLK TO SIM RST TO SIM DATA TO/FROM SIM CIN RIN DATA DDRV CONTROLLER SIDE DVCC CLK RST I/O VCC SIM SIDE
1555L F01a
Figure 1a. Level Translator Connections for Bidirectional Controller DATA Pin
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is forced below 1.2V, an undervoltage lockout circuit forces the LTC1555L-1.8 into shutdown mode regardless of the status of the M0-M2 pins. 10kV ESD Protection All pins that connect to the SIM (CLK, RST, I/O, VCC, GND) withstand over 10kV of human body model ESD. In order to ensure proper ESD protection, careful board layout is required. The GND pin should be tied directly to a GND plane. The VCC capacitor should be located very close to the VCC pin and tied immediately to the GND plane.
LTC1555L-1.8 CLK TO SIM RST TO SIM DATA FROM SIM DATA TO SIM CONTROLLER SIDE CIN RIN DATA DDRV DVCC CLK RST I/O VCC SIM SIDE
1555L F01b
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Figure 1b. Level Translator Connections for One-Directional Controller Side DATA Flow
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LTC1555L-1.8
TYPICAL APPLICATIO
WCDMA CONTROLLER
VCC
PACKAGE DESCRIPTIO
0.007 - 0.0098 (0.178 - 0.249) 0.016 - 0.050 (0.406 - 1.270)
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
RELATED PARTS
PART NUMBER LTC1555/LTC1556 LTC1555L LTC1755 LTC1756 LTC1986 DESCRIPTION SIM Power Supply and Level Translator SIM Power Supply and Level Translator Smart Card Interface Smart Card Interface 3V/5V SIM Power Supply in SOT-23 COMMENTS VIN = 2.7V to 10V; Step-Up/-Down Charge Pump VIN = 2.6V to 6V; Step-Up/-Down Charge Pump; DVCC as low as 1.425V VIN = 2.7V to 6V; 24-Pin SSOP Package; IQ = 60A VIN = 2.7V to 6V; 16-Pin SSOP Package; IQ = 75A VIN = 2.6V to 4.4V; IQ = 14A
1555l18f LT/TP 0601 2K * PRINTED IN USA
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
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WCDMA Cellular Telephone SIM Interface
1.425V TO 4.4V 1 2 3 4 5 6 7 8 LTC1555L-1.8 CIN RIN DATA DDRV DVCC M2 M1 M0 CLK RST I/O VCC VIN C1 + 16 15 14 13 12 11 0.1F 1F GND
1555L TA02
VIN 2.6V TO 6V CLK RST I/O
SIM
VCC = 1.8V,3V IVCC = 6mA 2.2F
10 C1 - 9 GND
Dimensions in inches (millimeters) unless otherwise noted. GN Package 16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.189 - 0.196* (4.801 - 4.978) 16 15 14 13 12 11 10 9 0.009 (0.229) REF
0.229 - 0.244 (5.817 - 6.198)
0.150 - 0.157** (3.810 - 3.988)
1 0.015 0.004 x 45 (0.38 0.10) 0 - 8 TYP 0.053 - 0.068 (1.351 - 1.727)
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8 0.004 - 0.0098 (0.102 - 0.249)
0.008 - 0.012 (0.203 - 0.305)
0.0250 (0.635) BSC
GN16 (SSOP) 1098
(c) LINEAR TECHNOLOGY CORPORATION 2000

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